NAND gate: Difference between revisions
Created page with "{| class="wikitable floatright" style="text-align:center" |- ! colspan="3" | NAND gate truth table |- bgcolor="#ddeeff" |colspan=2|'''Input''' || '''Output''' |- bgcolor="#ddeeff" | A || B || A NAND B |- |{{no2|0}} || {{no2|0}} || {{yes2|1}} |- |{{no2|0}} || {{yes2|1}} || {{yes2|1}} |- |{{yes2|1}} || {{no2|0}} || {{yes2|1}} |- |{{yes2|1}} || {{yes2|1}} || {{no2|0}} |} A '''NAND''' ('''NOT AND''') '''gate''' is a logic gate which produces an output which is fals..." |
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A '''NAND''' ('''NOT AND''') '''gate''' is a [[logic gate]] which produces an output which is false only if all its inputs are true; thus its output is [[complement]] to that of an [[AND gate]]. A LOW (0) output results only if all the inputs | A '''NAND''' ('''NOT AND''') '''gate''' is a [[logic gate]] which produces an output which is false only if all its inputs are true; thus its output is [[complement]] to that of an [[AND gate]]. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A two-input NAND gate's logic may be expressed as <math>\overline{A} \lor \overline{B} = \overline{A \cdot B}</math>, making a NAND gate equivalent to [[inverters]] followed by an [[OR gate]]. | ||
The NAND gate is significant because any [[Boolean function]] can be implemented by using any combination of NAND gates. This property is called "[[functional completeness]]". It shares this property with the [[NOR gate]]. | The NAND gate is significant because any [[Boolean function]] can be implemented by using any combination of NAND gates. This property is called "[[functional completeness]]". It shares this property with the [[NOR gate]]. | ||
== Symbols == | |||
ANSI Symbol | |||
[[File:NAND ANSI.svg|left|ANSI Symbol]] | |||
{{Clear}} | |||
IEC Symbol | |||
[[File:NAND IEC.svg|left|IEC Symbol]] | |||
{{Clear}} | |||
== Integrated Circuits == | |||
Some common implementations of the NAND gate as integrated circuits: | |||
{| class="wikitable" | |||
|+ | |||
!Name | |||
!Description | |||
|- | |||
! colspan="2" |CMOS | |||
|- | |||
|[[4011]] | |||
|Quad 2-Input NAND gate | |||
|- | |||
|[[4012]] | |||
|Dual 4-Input NAND gate | |||
|- | |||
|[[4023]] | |||
|Triple 3-Input NAND gate | |||
|- | |||
|[[4068]] | |||
|Mono 8-Input NAND gate | |||
|- | |||
! colspan="2" |TTL | |||
|- | |||
|[[74x00]] | |||
|Quad 2-Input NAND gate | |||
|- | |||
|[[74x10]] | |||
|Triple 3-Input NAND gate | |||
|- | |||
|[[74x20]] | |||
|Dual 4-Input NAND gate | |||
|- | |||
|[[74x30]] | |||
|Mono 8-Input NAND gate | |||
|} | |||
== See also == | |||
* [[AND gate]] | |||
* [[NOR gate]] | |||
* [[NOT gate]] | |||
* [[OR gate]] | |||
* [[XNOR gate]] | |||
* [[XOR gate]] | |||
Latest revision as of 05:02, 19 January 2026
| NAND gate truth table | ||
|---|---|---|
| Input | Output | |
| A | B | A NAND B |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
A NAND (NOT AND) gate is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A two-input NAND gate's logic may be expressed as , making a NAND gate equivalent to inverters followed by an OR gate.
The NAND gate is significant because any Boolean function can be implemented by using any combination of NAND gates. This property is called "functional completeness". It shares this property with the NOR gate.
Symbols
ANSI Symbol
IEC Symbol
Integrated Circuits
Some common implementations of the NAND gate as integrated circuits:
| Name | Description |
|---|---|
| CMOS | |
| 4011 | Quad 2-Input NAND gate |
| 4012 | Dual 4-Input NAND gate |
| 4023 | Triple 3-Input NAND gate |
| 4068 | Mono 8-Input NAND gate |
| TTL | |
| 74x00 | Quad 2-Input NAND gate |
| 74x10 | Triple 3-Input NAND gate |
| 74x20 | Dual 4-Input NAND gate |
| 74x30 | Mono 8-Input NAND gate |