NAND gate: Difference between revisions
Created page with "{| class="wikitable floatright" style="text-align:center" |- ! colspan="3" | NAND gate truth table |- bgcolor="#ddeeff" |colspan=2|'''Input''' || '''Output''' |- bgcolor="#ddeeff" | A || B || A NAND B |- |{{no2|0}} || {{no2|0}} || {{yes2|1}} |- |{{no2|0}} || {{yes2|1}} || {{yes2|1}} |- |{{yes2|1}} || {{no2|0}} || {{yes2|1}} |- |{{yes2|1}} || {{yes2|1}} || {{no2|0}} |} A '''NAND''' ('''NOT AND''') '''gate''' is a logic gate which produces an output which is fals..." |
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The NAND gate is significant because any [[Boolean function]] can be implemented by using any combination of NAND gates. This property is called "[[functional completeness]]". It shares this property with the [[NOR gate]]. | The NAND gate is significant because any [[Boolean function]] can be implemented by using any combination of NAND gates. This property is called "[[functional completeness]]". It shares this property with the [[NOR gate]]. | ||
== See also == | |||
* [[AND gate]] | |||
* [[NOR gate]] | |||
* [[NOT gate]] | |||
* [[OR gate]] | |||
* [[XNOR gate]] | |||
* [[XOR gate]] | |||
Revision as of 04:50, 19 January 2026
| NAND gate truth table | ||
|---|---|---|
| Input | Output | |
| A | B | A NAND B |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
A NAND (NOT AND) gate is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs tot he gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A two-input NAND gate's logic may be expressed as , making a NAND gate equivalent to inverters followed by an OR gate.
The NAND gate is significant because any Boolean function can be implemented by using any combination of NAND gates. This property is called "functional completeness". It shares this property with the NOR gate.